个人简历
教育背景
2004~2008 威斯尼斯人60555 微电子学与固体电子学 学士
2008~2011 北京大学 微电子学与固体电子学 硕士
2014~2020 中国科学院大学 微电子学与固体电子学 博士
工作简历
2011~2018 中科院微电子所研究实习研究员、助理研究员
2014~2018 武汉新芯、长江存储资深工程师
2019~2023 中科院微电子所副研究员
2023~至今 威斯尼斯人60555电光学院副教授
科研项目/成果/获奖/专利
l 主持中科院青促会项目“三维存储器中高密度低成本的字线台阶结构设计及工艺研究”。
l 参与国家存储器基地建设“先进三维NAND型闪存存储器集成工艺研究及其产业化”。
l 参与国家极大规模制造装备及成套工艺子课题：体硅FinFET 与关键工艺研究。
l 参与国家极大规模制造装备及成套工艺子课题：22纳米工艺整合及集成技术。
l 累计获得授权中国专利及美国专利共40余项
论文/专著/教材
代表性论文：
[1] Runhao Han, Peizhen Hong*， Zhang B, et al. Understanding the stress effect of TiN top electrode on ferroelectricity in Hf0. 5Zr0. 5O2 thin films[J]. Journal of Applied Physics, 2023, 134(19).
[2] Mingkai Bai, Peizhen Hong*,Runhao Han,et al. Regulating ferroelectricity in Hf0. 5Zr0. 5O2 thin films: Exploring the combined impact of oxygen vacancy and electrode stresses[J]. Journal of Applied Physics, 2023, 134(17).
[3] Runhao Han, Peizhen Hong*，Shuai Ning, et al. The effect of stress on HfO2-based ferroelectric thin films: A review of recent advances[J]. Journal of Applied Physics, 2023, 133, 240702 (Editor`s Pick)
[4] Runhao Han, Peizhen Hong*, Jingwen Hou, Bao Zhang, et al, The Top Electrode Tensile Stress Effect on Ferroelectricity of Hf0.5Zr0.5O2 Thin Films,2023 7th IEEE Electron Devices Technology & Manufacturing Conference (IEEE EDTM 2023), Seoul Korea,2023.3（Invited Report）
[5] Bao Zhang, Peizhen Hong, Jingwen Hou, et al. Doped HfO2-based ferroelectric-aided charge-trapping effect in MFIS gate stack of FeFET[J]. Journal of Applied Physics, 2023, 133(16)
[6] Peizhen Hong, Qiang Xu, Jingwen Hou, Mingkai Bai, Zhiguo Zhao, et al. Pre-metal dielectric PE TEOS oxide pitting in 3D NAND: mechanism and solutions[J].Semiconductor Science and Technology, 2021, 37(2): 025007
[7] Bao Zhang, Siwei Mao，Chunlong Li，Peizhen Hong，Jingwen Hou，et al.Dual-axis control of magnetic anisotropy in single crystal Co2MnSi thin film through piezo-voltage-induced strain[J]. Nanoscale advances, 2022, 4(16): 3323-3329
[8] Bao Zhang, Chunlong Li, Peizhen Hong, Zongliang Huo. Ferroelectric control of the perpendicular magnetic anisotropy in PtCoRu/Hf0.5Zr0.5O2 heterostructure[J].Applied Physics Letters, 2021, 119(2): 022405-1-6
[9] Peizhen Hong, Zhiguo Zhao, Jun Luo, Zhiliang Xia, Xiaojing Su, Libin Zhang, Chunlong Li, Zongliang Huo.An Improved Dimensional Measurement Method of Staircase Patterns with Higher Precision in 3D NAND[J]. IEEE Access, 2020, 8: 140054-140061.
[10] Peizhen Hong, Zhiliang Xia, Huaxiang Yin, Chunlong Li and Zongliang Huo.A High Density and Low Cost Staircase Scheme for 3D NAND Flash Memory: SDS(Stair Divided Scheme)[J].ECS Journal of Solid State Science and Technology, 2019, 8(10): P567.
[11] Lingkuan Meng, Peizhen Hong, Xiaobin He, et al. Gate patterning in 14 nm and beyond nodes: from planar devices to three dimensional Finfet devices[J]. Applied Surface Science, 2016, 362:483-489.
[12] Changliang Qin, Guilei Wang, Peizhen Hong, et al, Process optimizations to recessed e-SiGe source/drain for performance enhancement in 22nm all-last high-k/metal-gate pMOSFETs[J]. Solid State Electronics, 2016, 123:38-43.
[13] Xiaolong Ma, Huaxiang Yin, Peizhen Hong, et al, Self-Aligned Fin-On-Oxide (FOO) FinFETs for Improved SCE Immunity and Multi-VTH Operation on Si Substrate[J]. ECS Solid State Letters, 2015, 4(4).
[14] Xiaolong Ma, Huaxiang Yin, Peizhen Hong, et al, Gate-All-Around Silicon Nanowire Transistors with channel-last process on bulk Si substrate[J]. IEICE Electronics Express, 2015, 12(7): 20150094-20150094.
[15] Peizhen Hong, Zhiguo Zhao, Chunlong Li, Lingkuan Meng, Yongkui Zhang, Xiaobin He,et al. Finfet gate etch towards 16nm CMOS technolodgy. Proc.of the 225th Electrochemical Society(ECS) Meeting, Orlando, American, 2014.
[16] Qingzhu Zhang, Peizhen Hong, Hushan Cui, et al, A Novel Self-Aligned Source/Drain Contact Technology, Micronanoelectronic Technology, 2014.
[17] Peizhen Hong, Zhongyang Guo, Zhenchuan Yang, Guizhen Yan. A method to reduce notching effect on the anchors of a microgyroscope. Proc. of the 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems(MEMS) , Kaohsiung, Taiwan,2011：346-349.
[18] Liang Qian, Peizhen Hong, Lina Sun, Guizhen Yan, CMOS compatible Process for Suspended High-Aspect-Ratio Integrated Silicon Microstructures. Proc. of the 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems(MEMS) , Kaohsiung, Taiwan,2011：405-408.
教材
《存储器工艺与器件技术》霍宗亮，夏志良，靳磊，王颀，洪培真 编著,2023.8
授课
研究生课程《高等半导体器件物理》
社会兼职
中国电子元器件关键材料与技术专委会委员,Journal of Advanced Dielectrics 期刊青年编委
